
TSMC Capacity Wall Forces Google to Split TPU AI Chips With Samsung
Google’s next-generation AI accelerator will split across two rival foundries, exposing exactly where power concentrates in the global semiconductor supply chain. According to industry sources on July 15, Samsung Electronics approached local design partners ADTechnology and Gaonchips to outsource the back-end physical implementation of the input/output (I/O) die for Google’s 10th-generation Tensor Processing Unit (TPU), codenamed Icefish. The compute processor stays at TSMC on its 1.4nm process, while Samsung fabricates the 2nm I/O die to manage data transfer with high-bandwidth memory (HBM) ahead of targeted 2028 mass production.
This outsourcing underscores a double bottleneck. Surging demand from foundry clients—including Tesla's AI5/AI6, Anthropic, and DeepX—has stretched Samsung’s internal engineering capacity to the limit, forcing it to offload placement, routing, and design-for-test work to external houses despite having handled Tesla's 2nm autonomous driving chip internally. Yet South Korean design houses are showing selective restraint. Back-end physical implementation yields low margins of several billion won, dwarfed by the tens or hundreds of billions generated by full turnkey ASIC programs. With ADTechnology committed to its 2nm server CPU (ADP620) targeting over 1 trillion won in annual revenue by 2028–2029, and Gaonchips absorbed by an 800 billion won automotive AI chip with Hyundai Motor, both view the Google assignment as a low-margin prestige option to establish a 2nm track record. That leaves smaller rival Alphachips to pursue the contract more aggressively.
The Economics of Disaggregation
Google’s dual-foundry split on Icefish—co-developed with ASIC partner MediaTek—is a calculated exercise in disaggregation. A monolithic accelerator cannot be economically dual-sourced without duplicating immense layout and validation expense. Splitting the architecture into chiplets lets Google isolate its performance-critical transistors on TSMC’s 1.4nm lines while shifting peripheral data-transfer functions to Samsung’s 2nm node.
This follows the classical industrial pattern of controlled spillover: when a dominant supplier hits capacity ceilings, customers migrate peripheral components first, keeping their core compute engines at the incumbent leader. TSMC’s sub-3nm wafer and CoWoS packaging lines are fully booked through 2027–2028, as flagged by Broadcom. Yet TSMC’s pricing and allocation power remain untouched. It generated a record NT$442.68 billion in June (up 67.9% year-on-year; first half up 35.6%) and guided second-quarter operating margins to a software-like 56.5%–58.5%. Meanwhile, Samsung’s first-quarter foundry revenue fell 5.8% sequentially despite the AI boom, proving that high-profile customer discussions and prototype work (such as DeepX’s DX-M2) have not yet converted into profitable mass production.
The Scarcity Layer and the Monopsony Wedge
The consensus assumes TSMC’s capacity wall is eroding its moat. The economic reality is the exact reverse: TSMC is deliberately operating as the scarcity layer of the AI stack. By ceding lower-margin peripheral silicon like I/O and base dies to secondary foundries, TSMC optimizes its revenue mix, preserves pristine cleanrooms for premium compute, and externalizes integration risk while commanding the transistors that dictate workload performance.
For Google, qualifying Samsung is less about physical redundancy than establishing a powerful monopsony lever. A viable second foundry gives the hyperscaler critical bargaining leverage over TSMC during negotiations for wafer pricing, allocation priority, and CoWoS packaging slots. Samsung’s participation may ultimately save Google more in system-wide TSMC procurement costs than it generates in direct wafer revenue for South Korea's logic industry.
In this secondary ecosystem, the rarest asset is not installed lithography equipment, but engineering talent qualified to close timing, power integrity, and test coverage on an immature 2nm node. South Korea’s design solution partners hold that finite human capital. Consequently, their most logical destination is not standalone margin expansion, but acquisition by Samsung, hyperscalers, or tier-one ASIC vendors eager to lock up scarce deployment engineers. TSMC commanded 72% of global foundry revenue in the first quarter with nearly $35.9 billion, while Samsung held 6.5% at roughly $3.2 billion. The emerging "secondary silicon empire" is not a commercial rival; it is an indispensable, customer-funded qualification network orbiting TSMC’s scarcity engine.
not investment advice